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Hi,
I set them as all layers valid and visible to make them visible in ext view, but it doesn't fix the extracted view which shows the pmos and nmos device symbols. However, the simulation team is ok as far as they are getting the parasitic values in the view. So thanks for your inputs...
Hi,
I am using Assura RCX to carry out parasitic extraction of an inverter layout. Cadence icfb version I am using is IC5141USR1. The tool is extracting the layout successfully, but the extracted view shows NMOS and PMOS symbols in place of metal layers. Parasitics (resistors and...
Hi Erik,
Line 271 contains following pax16 command over which the icfb is failing.
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#================================================= =========#
# Run pax16 to generate capfile...
Hi,
I want to do parasitic extraction of an inverter design using Assura RCX.Its a UMC180nm project. DRC and LVS are clean for this design. Assura is version 3.1.6 on Linux. It can be serious bottleneck for the project undertaken.
Getting following failure log upon running...
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