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Recent content by analogengineerrf

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    Operational Amplifier Design

    Thanks to you both for the kind reply. In my design, I need a single ended output, so how to balance the output at Vsy/2. Is there any alternative to CMFB circuit or any technique to convert differential output obtained using CMFB to single ended output. I am doing the design using the...
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    Assura Rule deck file

    Most probably in the path where your PDK is installed. The rule file that you select in Assura is the file that contains DRC rules.
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    Operational Amplifier Design

    Hello All, I need to design an operational amplifier, to be used as an instrumentation amplifier with sensor chip. The sensor output voltage varies from 0.1 to 0.5 Volt. Kindly help me in writing the specifications for my opamp and also which opamp architecture should i use in my design. The...
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    [Moved]: Monte Carlo Yield Analysis

    Re: Monte Carlo Yield Analysis Thanks to all for the kind help. To give an idea about my design, I am using the Beta Multiplier Reference circuit to generate a reference current of 10uA. The circuit has a resistor in the drain side. How much may be the effect of this resistor in Monte Carlo...
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    [Moved]: Monte Carlo Yield Analysis

    Hello All, Please tell me how to decrease the mismatch and increase the yield of my designed Operational Amplifier, as during the monte carlo simulation for yield analysis, the open loop gain drops too large from the gain value it has been designed for. Any help would be highly appreciated...
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    Two stage Op Amp design issue

    Hello all. Plz tell me, if it is possible to get a successful Op Amp IC based on 2 stage architecture. What I see is that, during the Monte Carlo simulation, the gain is varying very huge, and even to the negative gain (-30db), while during the process corner simulation, everything seems to be...

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