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Recent content by analog2003

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    DAC chip select and write input pins

    Hi all, Most of the DACs I have come across use chip select and write input pins. I fail to understand the need for 2 pins when 'write' function happens only for one combination of chip select and write input, and 'hold' for the rest of the combinations. Why can't a single pin be used so write...
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    Dual power supply digital design

    Hi all, I am using the TSMC CMOS LOGIC 0.18um (3.3V) technology. I was wondering in which stage of the digital design flow would I have to mention about dual power supply (+/- 1.65 V). I am in the synthesis stage and the library I am using has a nominal voltage of 1.8 V for a tt process...
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    transmission gate sizing

    Hi, I am unable to decide how to size a transmission gate. I sized them in the ratio of their unCox. The delay is not a huge concern, because the sampling capacitance is very small. Is that it, or some other factor like channel charge injection has to be considered? Thanks for your help.
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    interconnect parasitics estimation

    Thanks, for pointing out that one. 'estimation' by itself means rough calculation, so I guess 'accurate estimation' should make no sense! Also, thanks for the ideas.
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    interconnect parasitics estimation

    interconnect parasitics Hi all, I am designing a CMOS inverter, for which i need to estimate the interconnect parasitics prior to the layout-phase so i can estimate the delay. But, I was wondering how I could determine the dimensions of the interconnect in the design phase itself. Thanks for...
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    Is 1k ohm for an on-chip resistor a large value?

    Re: on-chip resistance Yes, I read about the different kinds of resistors available and seem to have a better understanding of this topic now. and so understand that 1k ohm is not a huge resistance. I am using 3.3V devices in the CMOS 0.18um technology, which is a single poly process...
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    Is 1k ohm for an on-chip resistor a large value?

    resistor chip Hi all I am implementing an op amp application in cmos 0.18um (thick oxide) technology. This application has about 7 resistors. Is 1k ohm for an on-chip resistor a large value? How do I know the maximum value for an on-chip resistor? Any kind of help is highly appreciated. Thanks.
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    DC analysis error in Cadence

    dc analysis Hi all I encountered a strange problem during a DC analysis in Cadence. 'x' is a variable in my circuit. The output of my circuit should be 0V for x=1 (for any vin =[-0.2 0.2]). a) When I simulate the circuit for x=1; and print the output DC node voltage, it reads -690mV b) When I...
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    Choosing a technologysuitablefor design

    mosis ibm cmrf8sf Thanks for the info. I have been using cadence for quite some time now, but this is the first time I am doing a chip design. So, I started off my design in the 0.18um technology. Looks like switching to 0.13um is a good option, also considering that it has around 4-5 fab runs...
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    Choosing a technologysuitablefor design

    cmc cmosp18 design kit 2.0 Hi all, Is there any way I can decide which technology is best for my design? or is it just by random choice that one uses a particular technology. I am confused as to which one to use, CMC's CMOSP18 Design Kit for the 0.18-micron CMOS technology from TSMC or the...
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