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Recent content by anadigi

  1. A

    switched cap circuit analysis

    Hello Frds, I am posting 2 pictures.. Plz help me analysing these circuits.. Assume some intial conditions for the negative terminal of OPAMP.. The questions I hav in mind are: 1. Wht do these circuits do? Wht is the fundamental difference in working of these circuits? 2. Wht will be the...
  2. A

    Spectre to Hspice netlist conversion.

    convert spectre netlist to hspice Hi, That CDL netlist removes all V, I, VCVS kinda stuff (or may be something more)..can somebody provide some script to convert Spectre language netlist to ELDO format.. Thanx
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    Does anybody have the handout of EE240 from Berkeley?

    Re: EE 240 class handout dude u shd hav search this on google.. anyway, here is the link **broken link removed** c ya
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    Looking for documents about overviews on DAC/ADC

    Re: overviews on DAC/ADC A nice overview can be found in Allen Holbergs book.. c ya
  5. A

    Berkeley EECS140,240,247 Classes

    cmos vlsi webcast video lectures download Here is the complete collecion.. :wink: A 13-Bit, High-Gain, 3V CMOS Differential Transconductance Amplifier By Khoo.pdf A Fully Differential CMOS Telescopic Operational Amplifier with Class AB Output Stage By Yang.pdf A Gain-Boosted 90-dB Dynamic...
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    Berkeley EECS140,240,247 Classes

    27 lectures and videos from professor jacob baker It wud be very helpful, if u can give more info abt this server.. I was not able to connect to the server by ftp://202.115.7.3 Is this a japanies/chinies server.. c ya
  7. A

    How to caculate the voltage in picture?

    write mesh equations. 3 variable 3 equations.. on solving this u can get currents (a function of transistor Beta) in each branch.. now take the branch with resistors.. calculate voltage across each resistor.. thats all..
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    EOC SOC in pipelined ADC

    I hav used Pipeliened architecture (2.5b/stage) for my ADC..Now I got few more doubts..i never seen anybody putting SOC(start of conversion pulse) and EOC(end of conversion pulse) in pipelined ADC..how to do that?..waiting for ur suggstions.. Regards
  9. A

    analog IC design lecture

    "h**p://www.ics.ee.nctu.edu.tw/~jtwu/cnote/00arch/aic/" Lectures that r available here r older version of lecture that will be at "h**p://www.ics.ee.nctu.edu.tw/~jtwu/cnote/Int/aic01-idx.html"
  10. A

    How to save the Berkeley lecture files ?

    Re: e140 It was answered a long back.. Make a search for nettransport..u will get the couple of posts..the last one will answer ur question..
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    analog IC design lecture

    "http://www.ics.ee.nctu.edu.tw/~jtwu/cnote/Int/aic01-idx.html" if u got the lecture downloded plz upload on the board..
  12. A

    Convex Optimization by Stephen Boyd and Lieven Vandenberghe

    Re: Convex Optimization It Says: Forbidden 8O You don't have permission to access /~boyd/cvxbook.html on this server :cry:
  13. A

    code size for a program..Urgent

    Is there any tool which will give the code size for a program written in C for a particular controller? Is there any other way of determining. Ppl who r doing coding for controllers in C may be able to tell regarding the same.
  14. A

    Optimum amplitude of the clock for switched capacitors

    Re: clock voltages Obviously the amplitude shd be very higher than threshold voltage.. 8O
  15. A

    how to plot open-loop gain vs frequency

    Inductor (very high value) will be the better choice.. If u use resistor, u need to be careful..It may cause a false information of 1st pole in ur o/p response.. I hav also seen a T-network(RCR) been used in feedback..but never tried.. Regards
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