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Recent content by AMS2007

  1. A

    PLL without external loop filter

    PLL based frequency Synthesizer is more exact expression!!!
  2. A

    Question about the Vctrl of the VCO for PLL

    Re: DLL Vctrl question It depends on the structure of VCDL in Analog DLL. also the structure of VCO in PLL.
  3. A

    About the Layout Style

    Pls refer to below link. I think it is very similar subject. :D
  4. A

    Information about CMFB and its application

    Re: CMFB Pls think about the common mode control. Some applications use CMFB loop which is passive or active type. For example, fully differential opamp in PipelineADC, fully differential chare pump in PLL, differential signaling drivers..., To control common mode level in differential’s...
  5. A

    Looking for a 64 channel ADC

    Re: 64 channel ADC Hello, Which application do you want to use it in? You want to design Interleaved ADC or ROIC(read out IC application)?
  6. A

    please help me on LVDS problem

    Pls check the GPIO & LVDS IO Power If they are seperated or not. and also check the CFB's stability. I guess problem may be from chip inside. good luck!
  7. A

    About the Layout Style

    Thank for fixrouter4400's answer. But, in your Answer I can't understand that we get good isolation as the merits. Could you explain to me in more detail? I have attached another example below. Type A is general layout style. Left & right building blocks have some distances to keep block...
  8. A

    About the Layout Style

    Hi All, In my attached file as you see, for example , There are a lot of Well and Substrate Contact. At this kind of layout style like filling Contacts in empty space, What are merits and demerits? Thanks in advance.. **broken link removed**
  9. A

    Error when adding a line in cdsenv file

    cdsenv Hi ! I guess you have seen Warning message as Line must contain 4 elements also. asimenv.startup projectDir string "~/temp" nil => asimenv.startup projectDir string "~/temp" no need for nil Thanks.
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