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Recent content by amirintisar

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    Explanation of Spartan 3 SRAM

    spartan 3 port delay Hello, sos for the late reply, i was away. I work for a group that use CCDs for scientific applications like x-ray imaging and my project involves x - ray diffraction using CCDs. Your hobby project is probably very similar to the work i am doing. I am using the FPGAs to...
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    FPGA synthesizing real numbers??

    A datacard is something used to read in data (digital or analogue) from any external device, in my case digital. I have 16 bits leaving my FPGA and enterring the datacard. The datacard comes with dll's that you can call using VB,C++ and other higher level languages. Using these dll's, you can...
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    FPGA synthesizing real numbers??

    Hey Folks, i am using a SPartan 3 and am trying to send data to the PC via a Datacard. The communication between the two is fine but there is a problem with the data coming in to the PC. I am using the verilog HDL with Xilinx ISE 6.3, and i have programmed the FPGA to send out...
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    Explanation of Spartan 3 SRAM

    spartan 3 sram read and write Hi, thanks for the quick reply, i had a look at the "synthesis and design verification guide"...good stuff. What do you mean by 1K x 18 bit block RAM ?. Does this mean i am limited to 1000 18 bit values?. I am storing very high resolution CCD images which will...
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    Explanation of Spartan 3 SRAM

    Hello all, i am very new to FPGA desing and finding it a little difficult to understand some terminology in the Spartan 3(XC3S200) SRAM department....Mainly Block Ram and distributed. Basically i have 16 bits of digital data coming in from an ADC and i want to store it in the (256K x 16 bit...

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