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Recent content by amanath

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    Lectures on Introduction to CMOS VLSI Design

    Need Book The site free4vn.org seems to be in different languange and not in English
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    Which technology is preferable in RF and memory design?

    layout design Does anyone can confirm tht RF is worked on 180 and 90nm. I think its only till 350nm.. Plz clarify.
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    how to improve the parr of a bandgap

    Large L means 1. lambda effect lower 2. o/p res Rds of tr is higher Basically u need higher resistance. U can do by decreasing W also but the lambda effect gets decreased by big L. So anther adv
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    Please give me suggestions for choosing OPAMP buffer

    op amp buffer I think u can go for TI or National Semicondutor site and go for product option. Select which product u want. U will get a table listing the different spec. Or else there will be option for selecting the reqd spec
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    How to get output impedance requested by IEEE 1596? ( LVDS)

    ieee lvds Did not understand ur problem clearly..
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    Please expain to me why DLL has no jitter accumulation...

    even i need.. plz uplaod.. thanx!
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    Years of experience in IC-level analog design

    I need the basics of dll .. can any body upload any tutorial or text book
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    Looking for information about delay locked loop design

    delay locked loop design even i need plz upload
  9. A

    [help]DDR sdram controller design in a chip

    dll training sdram I need the basics of dll .. can any body upload any tutorial or text book
  10. A

    DDR2 SDRAM controller

    I need the basics of dll .. can any body upload any tutorial or text book
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    How to choose specifications for delay locked loop

    delay locked loop u can have spec from JEDEC site for DDR SDRAM
  12. A

    How to choose specifications for delay locked loop

    Re: delay locked loop thanks for this info Added after 4 minutes: from sgsnet

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