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Recent content by ali-mac

  1. A

    Need coefficients for root raised cosine filter

    root raised cosine filter Hi, Can someone post the coefficients for a root raised cosine filter with the following specification Symbol Rate 1280000 Symbols/Sec Rolloff Factor 0.300 Sampling Frequency 5.12 MHz Number of taps = 41 Many Thanks Ali
  2. A

    FIR Design on XilinxSpartanII FPGA:Output Rounding Problem

    Re: ONEOverT Full Version, VHDL Code about Filter Matlab costs a fortune. You have to buy the base module, then the filter toolbox and then the fixed point toolbox. It is way overpriced.
  3. A

    FIR Design on XilinxSpartanII FPGA:Output Rounding Problem

    xilinx fir compiler core output sign Does Xilinx supply ONEoverT with the Spartan-3E starter kit? If so, where did you order it from? Ali
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