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Recent content by alex_hung

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    PROBLEM with XILINX SPARTAN3 STARTER KIT

    Hi, Please check the configuration mode setting jumpers: M[2:0], if you want to use JTAG to lownload the FPGA, you must set it to "JTAG" mode by these jumper. You can found what I say in the "user guide", Chapter 9, page36. Regards
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    Bluetooth 1.1 Core spec 1/5

    Here is one url: **broken link removed** **broken link removed**
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    Bluetooth 1.1 Core spec 1/5

    Bluetooth 1.1 Core spec 1/5 Uploaded file: **broken link removed**
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    Verilog HDL Synthesis A Practical Primer

    It's so nice for this article for Verilog starter!
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