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Capacitor
Hi,
I think the drop is due to the charge sharing to the parasitic cap. from the diode connected NMOS, in
one clock cycle
C*(1.8-0.5)=(C+Cpar)*VCCOUT_min
so if the C is much larger than Cpar, the VCCOUT
can be more close to VCC-Vthn.
Hi,
the reliability means how long does this chip works,
or due to leakage the life time of the chip. another
factor is under high power supply, does the chip or devices work well or not.
the burn in means test the device under low supply voltage, high temp. or put the device under critical...
Buffer compensation?
Hi, jordan 76
the res. and the cap. are for compensation the phase
margin, the designer want the dominate pole at the
last stage, to improve the stability.
analog power supply
Yes, if analog block is sensitive, you need another
regulator to supply power for digital block. because
badgap reference is very sensitive to digital signal.
the digital part will affect reference signal, so your
regulator can not get accurate voltage
how to do ac analysis of ldo
another way is add a large inductor on you feedback path, and a capacitor connect to ground from opamp side. this may help you to do AC simulation.
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