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Recent content by alam4vlsi

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    what is routing? types of routing? when can we say.. it s good routing?

    Hi, Routing: Routing refers to the process of physically connecting the instances in your design. There are four steps of routing operations: 1. Global routing 2. Track assignment 3. Detail routing 4. Search and repair Global Route assigns nets to specific metal layers and global routing...
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    what is useful skew ?

    Useful skew-If clock is skewed intentionally to resolve violations, it is called useful skew. For example there is setup violation in the design, Then we add some skew along the clock path in order to eliminate the setup violation. I hope you know the timing violations setup and hold violation...
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    What is IR drop? How to avoid .how it affects timing?

    1. The power supply in the chip is distributed uniformly through metal layers (Vdd and Vss) across the design (Power planning). These metal layers have finite amount of resistance. When voltage is applied to this metal wires current start flowing through the metal layers and some voltage is...
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    target and link library

    Hi. Target Library: A technology library that Design Compiler maps to during optimization. Along with the link_library and search_path variables, you need to specify the logical library that will be used for mapping/optimization. Link Library : The technology library that contains the...
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    Regions in floorplan

    Hi, For more information about blockages, Halos, Visit www.vlsi-basics.com/2013/08/blockages-and-halos.html
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    [SOLVED] floorplan effective techniques

    Hi, Follow weblink find some info about floorplan **broken link removed** Thanks, Alam
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    Power Gating & Power Isolation

    Hi, Refer follow link it may be useful. **broken link removed** Thanks, Alam
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    Reset conditon for logic

    Hi Raja, A Reset is required to initialize a hardware design for system operation and to force an ASIC into a known state. For more details visit https://only-vlsi.blogspot.in/ Thanks, Alam
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    How to choose the width and length for the digital logic design?

    Re: Digital logic design What do you mean? Transistor width and Length? or else any?
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    set up time check of d flipflop

    So, mark it as solved from your end...
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    set up time check of d flipflop

    Hi Esakki raja , Follow the below links. **broken link removed** https://vlsi-expert.blogspot.in/2011/05/example-of-setup-and-hold-time-static.html Thanks, Alam
  12. A

    Difference bettewen floorplanning and placement

    Hi Friends, Go through follow links. It may help you for understanding floorplanning and placement. **broken link removed** **broken link removed** Thanks, Alam
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    what is IR -Drop Analysis and documentation....

    Hi Qual_ti, The following links provide you basic idea **broken link removed** **broken link removed** Thanks, Alam
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    What is input delay and output delay?

    Hi Vidyut, SOLD is Synopsys Documentation on the Web is a collection of online manuals that provide instant access to the latest support information. With this program, customers can be sure that they have the latest information about Synopsys products. Thanks, Alam
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    [SOLVED] Problem during inserting buffer on clock net

    What error you are getting?
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