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Dear all,
We are doing a project on DDR3L IO, can anyone tel me what is the logic behind pull up and pull down ckt in zq calibration.
SAR logic is needed for counter or Can we use common counter counting from 0 to 15 for pcode and ncode counter.
thank you,
i hav a doubt that how temperature co-eff of poly resistor can be +ve or -ve depending on cluster size of polycrystal?
For poly resistor, corners will be res_typ, res_min and res_max or can we simulate it for ss and ff corners also?
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