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this topology has lower output resistance and bigger current drivability comparing to the internal PTAT current, because you cann't introduce big PTAT curretn in Bandgap due to power dissipation issue.Furthermore, this topology use the large input resistance of Amp to eliminate the effect of load.
Re: can you introduce power on reset for me,what the use of
as you can know from the name "power on reset", when power is on, the system first introduce a Reset period in which nothing is done. We know there is ripple or variation at supply voltage when the power is on, at the this time if the...
Re: can i do circuit simulation in spectre like we do in hsp
certainly you can!
most of foundries surpport models for Hspice, Eldo and spectre.
You can use model for spectre to run simulation just like Hspice.
More details,please refer to Spectre Manual :)
the paired PMOS here are used to prevent the current from HIVDD to GND when
the pmos & nmos ON simultaaneouslly for it leads to large power dessipation.
So when design a Level-Shifter, you should insure once the nmos at the output of low voltage inverter ON, the upper PMOS whould be OFF...
first you should have test equipments like :
1)Thermostream to adjust the temperatuer
2)power suplly
3)osclilloscope
4)I/V meter
first you evaluate several points such as -40°, -20°,0°, 25°,50°,85°,125° .etc
then make a graph V-T us these data.
Re: Question about DAC
i think it depends on the architecture of your DAC, mostly due to your decoder.
because when digital code changes from 0111 1111 ->1000 0000,
it maybe changes as below:
01111111 -> 00000000 ->10000000
so there emerges a ripple at the Analog output.
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