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Recent content by ah2007

  1. A

    vhdl code for an octal d-type flip flop register with clock enable

    but in this case reset on the link >>> so if i remove it and i will put clear is it correct ??
  2. A

    vhdl code for an octal d-type flip flop register with clock enable

    i anyone have idea about the code in vhdl Hex D flip flops with clear help me please thanks
  3. A

    vhdl code for an octal d-type flip flop register with clock enable

    I mean HEX D flip flops with clear.... not d-type flip flop register with clock enable not the same
  4. A

    vhdl code for an octal d-type flip flop register with clock enable

    not the same please click on this
  5. A

    vhdl code for an octal d-type flip flop register with clock enable

    the last line is ____ clear L clock X D X And Q Output is c Q0 ............inputs..................................output clear................clock............... D............Q L ......................X...................X............L H..................rising...
  6. A

    vhdl code for an octal d-type flip flop register with clock enable

    74)this is the function table (SN74) inputs output ____ clear clock D Q L X X L H rising edge H H H rising edge L L...
  7. A

    vhdl code for an octal d-type flip flop register with clock enable

    To be honest, I am a beginner in VHDl This is the table of HEX D flip flops with clear I do not understand it exactly
  8. A

    vhdl code for an octal d-type flip flop register with clock enable

    Sorry.... I tried many times, but I could not could you help me please.
  9. A

    vhdl code for an octal d-type flip flop register with clock enable

    hello please I need help in VHDl code Hex d flip flops with clear and testbench as well..... thanks
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