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Recent content by adithyasunil26

  1. adithyasunil26

    Simulation methodology for fractional-N synthesizer

    What is the best method to simulate fractional-N synthesizers? I would like to observe the shifts in average output frequency when I change the divide cycles of the programmable divider. I have attempted plotting the DFT of the output but this does not seem to be working because the output has...
  2. adithyasunil26

    Minimizing noise in voltage controlled ring oscillator

    Yes, the oscillator is to be used as a part of the synthesizer. I am in fact using a MOS varactor that is non-linear. Okay, I will add the bypass caps and buffers.
  3. adithyasunil26

    Minimizing noise in voltage controlled ring oscillator

    Thank you for taking the time to answer my query. I actually require the higher frequency so adding stages does not seem to be an option. I am using ideal sources in my simulation as of now so there should be no issue of external noises but I will keep this in mind for later. Please can you...
  4. adithyasunil26

    Minimizing noise in voltage controlled ring oscillator

    I am trying to minimize the phase noise in a voltage-controlled ring oscillator circuit. I have a simple circuit consisting of CMOS inverters stages and a MOS varactor at each stage controlled by a control signal. How should I go about minimizing the phase noise in this circuit? Any suggestions...
  5. adithyasunil26

    Minimizing noise in voltage controlled ring oscillator

    Hi everyone I am trying to minimize the phase noise in a voltage-controlled ring oscillator circuit. I have a simple circuit consisting of CMOS inverters stages and a variable capacitance at each stage controlled by a control signal. How should I go about minimizing the phase noise in this circuit?

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