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Recent content by acey80

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    PEX Netlist Simulation in Spectre

    spectre netlist simulation Hi all, Currently I'm doing post-simulation for my ring oscillator. I have issue with the PEX Spectre netlist generated by Calibre. I've tried 2 methods for simulating this PEX netlist. 1) ADE method: I created a symbol to be instantiated into my test bench. I...
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    Post Layout Simulation (Back-annotation) - Cadence Spectre

    cadence parasitic back annotation Hi all, I want to check the layout performance compared to the circuit. I remember we have to extract the layout for parasitic values.. And so, I have: 1-circuit schematic 2-extracted (parasitic) then, what are other settings i have to do? thanks in...
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    fpga board for wireless remote control???

    hi all, we are having this big project which involves the fpga board... i'm just wondering... Is it feasible to use FPGA board for remote wireless control?? If so, briefly/roughly, how is it done?? Maybe in terms of the concept? Which type of fpga board?? Cyclone? Stratix? Alternative board...
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    HELP!!! MOS Capacitor - capacitance calculation

    Hi, i'm considered quite new in cmos layout...although already about 2 yrs..:| How to determine the value of W and L of the nmos or pmos capacitor? from the basic formula, Cox = 2fF/µm x µm & CMOS-cap = Cox*W*L what is µm x µm? is it varies? or a fixed value of 1 µm² i'm so tensed as I'm...
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    Verilog-modified 3to8 decoder...wrong?

    verilog decoder schemantic hi all, i'm actually doing a project that includes the 3-8 decoder. while some of u think a 3-8 decoder has a simple schematic with the standard truth table, which is: the schematic should be like: ----- now, what if the truth table is like this? the idea is...
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    How to construct higher resistance 4 resistor in TSMC0.35um

    Currently we are working on a big project. The highest resistor value is 80kohm. If we are only using poly2 (which has the highest sheet resistance in TSMC 0.35um), the resistor size is going to be very very big. The resistor type is double poly, and so the resistor is constructed with poly2 &...
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    What is Boiling Test in the IC Fabrication??

    :?: It's about the IC Test after fabrication.... Anyway, thanks!!
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    What is Boiling Test in the IC Fabrication??

    What is the Boiling Test for? and How is it conducted?? I tried to find it in the Internet but NONE! Thanks!
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    Why do we need Voltage Controlled Oscillator (VCO)?

    Why need VCO??? :( Why do we need VCO? Is it because we have many stages in our circuit and we need VCO to control the fluctuating feedback voltages?? :?:
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    What should be the IF in VCO design using Superheterodyne?

    Re: VCO Design.... Opps! :( Actually I'm quite new in this RF technology. IMD Products?? What does it mean? Is it Inter-Metal Dielectric?, in-mold decals?, intermodulation distortion?, Initial Marching Direction?, :?:
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    What should be the IF in VCO design using Superheterodyne?

    VCO Design.... :D What should be my IF in designing VCO at 868 MHz CMOS Tech, using Superheterodyne Transceiver? Thanks!
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    Design of VCO for RFID application....

    I've just got the title of my big project: (Superheterodyne Transceiver) Design of IF VCO RFID application at 868 MHz using CMOS Technology. 8O Now I'm quite blur on where to begin. Can someone pls tell where should I start in this research. Your replies are very much expected and appreciated.
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