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Recent content by Abdul mohsin

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    About HSPICE COMMAND For setup,hold,leakage power,Dynamic power

    Good Aftrnun to everyone:About HSPICE COMMAND For setup,hold,leakage power,Dynamic power. I added for my cell i.e., Delays , risetime and falltime .My cell is Negative edge Dff synchronous with active low set .Any one say HSPICE commandsIf Somebody give any suggestions it is very helpful to me...
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    Regarding Negative edge D flip flop with synchronous active low set

    Send me ur mail id i will send screenshots brother.here the file is not uploading.
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    Regarding Negative edge D flip flop with synchronous active low set

    Is this circuit correct only na.K Actually i am not missed any wire brother . I am sending Screenshot which i drawn go through once. - - - Updated - - - Is this circuit correct only na.K Actually i am not missed any wire brother . I am sending Screenshot which i drawn go through once. - -...
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    Regarding Negative edge D flip flop with synchronous active low set

    regarding negative edge dff synchronous with active low set
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    Regarding Negative edge D flip flop with synchronous active low set

    Am Abdul regarding Neg edge Dff Synchronous with Active low set.I already send about this cell. But am getting wrong output it is working as latch...can u please give suggestion brot.I am sending screen shot please reply me brother. - - - Updated - - - Am Abdul regarding Neg edge Dff...
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    Regarding Negative edge D flip flop with synchronous active low set

    is it correct brother? am sending as screenshot plz go through it?
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    Regarding Negative edge D flip flop with synchronous active low set

    I drawn this circuit would u please suggest me,which book i hav to refer can u give me guidence...am attaching file.check once
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    Negative edge D flip flop with synchronous active low set

    I can't get it - - - Updated - - - sory i 4rget this is Asic
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    Regarding Negative edge D flip flop with synchronous active low set

    Negative edge D flip flop with synchronous active low set can any one draw the circuit of Negative edge dff with synchronous active low set ..actually i draw the circuit but am getting the wrong outputs by using the tool..so can any one suggest r any link for this cell....
  10. A

    Negative edge D flip flop with synchronous active low set

    can any one draw the circuit of Negative edge dff with synchronous active low set ..actually i draw the circuit but am getting the wrong outputs by using the tool..so can any one suggest r any link for this cell....
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    After synthesis about report_timing and report_qor.

    Am doing M.tech,i need to give presentation on terms which are in report_timing and report_qor.. REPORT_TIMING: Design : RSDecoder Version: D-2010.03-SP4 Date : Tue Apr 24 18:24:17 2012 **************************************** Operating Conditions: TYPICAL Library: saed90nm_typ Wire Load...
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