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I am testing a chip of a clock circuit.
At first it works normally,but later on I found the output(of a chain os inverter buffer) is appear as an DC clamped at some 1.9V.(Vdd=3.3).
I also notice that the clamped voltage is changing according to Vdd.
In the chip I did no ESD for the output...
For my current using technology,the foundry asserts I have to configure the LVS rule according to the specified process.
But I know little about the grammar of LVS rule file.(Any body provide some document,plz???)
So I read through the LVS rule file and set some options according of the comment...
I found it in a paper "1~99% Input Duty 50% Output Duty Cycle Corrector".
The author might use such simple configuration to achieve maximum unity-gain bandwidth for a given technology.
But the paper just give simulation result.
My doubt is:
Do we use such simple configuration OTA in practice...
vdd/2 faq vdd
Hi,
I've read a topic about vdd/2 bias generator.But in my case I need a bias voltage follows the vdd/2,even if vdd fluctuates.
I am considering resistor divider,but the matching and area of resistors seem painful.
What about doide connected N/P mos divider?Is there anything to...
You can refer to any classic teaching material on analog IC design.
I recommend you Sansen's 'Analog Essential',which analysis the 2stage OTA in great detail.
Regards.
For calibre,you can do PEX to get the .netlist and .pex file to do post simulation.
Besides,you can treat the extract view equally as a schemetic view...
There's no determined r/f time relates to clk frequency.
Added after 3 minutes:
Instead,the size of the buffer,load capacitance,resistance,and output swing actually affect.
flow of ic design
Just simply gooooooooooogle
say,
https://ecad.tu-sofia.bg/education/courses/analog-ic-design/Analog%20IC%20Design%20Flow.htm
Added after 1 minutes:
https://www.rficdesign.com/download/rfic_design_flow.doc
books on adc/dac
1.CMOS Data Converters for Communications 2002 Kluwer
2.Principles of Data Conversion System Design
3.he Data Conversion Handbook
4.CMOS-Integrated-ADC-and-DAC-2nd-version
All of them are available in this forum.
Added after 1 minutes:
EE247 also covers all the subject you...
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