FORUM_RULES
Joined: 16 Aug 2004
Posts: 100003
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 23 Nov 2004 20:50 Verilog versus VHDL |
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This old debate about who uses what has been posted many times here, and a lot of opinions about this issue can be found on forum. A simple search will guide you. If you are interested in this, please read or reply in old topics, do not start a new one.
Here's an article about Verilog vs. VHDL:
VHDL & Verilog Compared & Contrasted
Plus Modeled Example Written in VHDL, Verilog and C
http://www.angelfire.com/in/rajesh52/verilogvhdl.html
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