Rules | Recent posts | topic RSS | Search | Register  | Log in

How to measure VIH and VIL (ac) in Hspice?

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout
Author Message
beckwang



Joined: 04 Aug 2004
Posts: 4


Post26 Oct 2004 10:17   How to measure VIH and VIL (ac) in Hspice?

it is easy to measure vih and vil through DC scan in hspice, but how to get the vih(ac) and vil (ac) value in hspice?
Could you give me some advices!thank!
Back to top
leo_o2



Joined: 03 Sep 2004
Posts: 330
Helped: 20


Post26 Oct 2004 10:24   Re: How to measure VIH and VIL (ac) in Hspice?

What is your mean for VIH(ac)? Did you decribe comparator threshold?
Back to top
beckwang



Joined: 04 Aug 2004
Posts: 4


Post26 Oct 2004 10:31   Re: How to measure VIH and VIL (ac) in Hspice?

VIH(ac): ac input logic high
VIL(ac): ac input logic low
Back to top
devrimaksin



Joined: 13 Oct 2004
Posts: 93
Helped: 9
Location: Dallas, Texas, USA


Post26 Oct 2004 19:22   How to measure VIH and VIL (ac) in Hspice?

There is no such definition,
You might be confusing propagation
delay and VIH.
When you apply a signal at the input
it takes for a while for the output to respond,
But at the same time if you keep increasing the
input, you might think that the input value at the time of output signal is changing state is VIH and/or VIL, this is not true. The problem is simply, at lower level of signal (or when you get closer to the margins), it takes longer for the circuit to response. That is why WIH and WIL are defined DCwise and not AC wise, equivalently, if you have a huge capacitor load at the output, you will see the same effect. So VIH and VIL is constant and determined by the DC analysis, but propogation delay is not and it is a function of the circuit load, input signal level and sizing and biasing
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> Analog IC Design & Layout
Page 1 of 1 All times are GMT + 1 Hour


Abuse
Administrator
Moderators
topic RSS 
sitemap