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ug02048
Joined: 11 Oct 2004
Posts: 22
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 11 Oct 2004 15:36 CMOS analog memmory |
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Hi all.. I am doing a project on analog memmory cells for a convolutional decoder. the basic idea is to use cascading sample and hold circuit with a buffer in between stages.
I am just wondering what is the limitation of using CMOS. and are there methods to improve the limitations?
I should mention that im just an undergraduate and a complete newbie in analog IC. may be you guys can point me to a right direction... 
Many thanks
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ianomaley
Joined: 06 Aug 2004
Posts: 12
Helped: 1
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| 12 Oct 2004 16:24 Re: CMOS analog memmory |
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The list of non idealities is large, your question seems too general but do not forget to consider if some of the following affect your circuit:
- Charge injection
- kT/C noise
- charge time to your capacitor if your sampling rate is too large
- offset at your buffer opamp
There are plenty of configurations and literature on analog memories. try to read some of these papers. I got some experience on these circuits, you can contact for any other specific question.
Or better start on any basic microelectronics book with the transmission gate.
Ian
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hmahdi12
Joined: 04 Nov 2003
Posts: 8
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| 13 Oct 2004 22:36 CMOS analog memmory |
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It's too difficult that you design analog memory.
You can study about digital circuit design by:
A. P. Chandrakasan AND R. W. Brodersen, “Low Power Digital CMOS Design,” Kluwer academic Publishers, 1995.
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ug02048
Joined: 11 Oct 2004
Posts: 22
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| 18 Oct 2004 11:02 CMOS analog memmory |
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Thanks guys ,, its not acturally memory memory, I am designing analog shift register using cascading sample and hold for a modified feedback convolutional decoder. can you guys give me some keywords on the limitation on cmos so i can google it? any help will be very much appeciated. 
all I got so far
- Charge injection
- kT/C noise
- charge time to capacitor
- offset at buffer opamp
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devrimaksin
Joined: 13 Oct 2004
Posts: 93
Helped: 9
Location: Dallas, Texas, USA
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| 23 Oct 2004 2:17 CMOS analog memmory |
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It depends on the sample and hold structure
that you will use.
Most probably, you will use flip-over
kind of SC sample&hold.
So you have to check
1. kT/C
2. Switch Bandwidth
3. Switch charge injection
4. Switch on resistance
5. Opamp Bandwidth
6. Opamp GBW
7. Opamp offset
8. Opamp finite gain
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cetc1525
Joined: 08 Oct 2004
Posts: 177
Helped: 3
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| 23 Oct 2004 11:12 Re: CMOS analog memmory |
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| the noise and the offset is your first problem
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