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vaf20
Joined: 27 Jan 2003
Posts: 163
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 09 Oct 2004 19:19 Pin to Pin delay!!! |
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hi
what's this exactly?
tnx
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ramesh
Joined: 19 Jan 2003
Posts: 1234
Helped: 4
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| 09 Oct 2004 19:42 Re: Pin to Pin delay!!! |
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| This is the propogation delay of a signal from input pin to output pin with the logic in between.
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djalli
Joined: 10 Nov 2001
Posts: 887
Helped: 15
Location: 1600 Pennsylvania Avenue, Washington DC 20500
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| 09 Oct 2004 19:54 Re: Pin to Pin delay!!! |
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| vaf20 wrote: |
hi
what's this exactly?
tnx |
And to add to discussion are:
http://www.see.ed.ac.uk/~gerard/Teach/Verilog/me5cds/pin_pin.html
Pin-to-Pin delay, also called path delay, is delay assigned to paths from each input to each output.
http://www-ee.eng.hawaii.edu/~msmith/Courses/Week/CH11/CH11.21.htm
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au_michael
Joined: 05 Oct 2004
Posts: 14
Helped: 1
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| 10 Oct 2004 4:37 Re: Pin to Pin delay!!! |
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| I consider your pin to pin delay belong out of the chip. If so, the delay is depent on the length of the trace, the material of your PCB and the inner or outter layer.
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ramesh
Joined: 19 Jan 2003
Posts: 1234
Helped: 4
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| 10 Oct 2004 8:07 Re: Pin to Pin delay!!! |
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| At very high operating frequencies the wire delays due to parasitic inductance and capacitances come into picture in addition to the logic delays.
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dewdrop
Joined: 27 Jul 2003
Posts: 22
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| 11 Oct 2004 5:08 Pin to Pin delay!!! |
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Pin tio Pin delay related with the chips which you used, the logic in the chip and the founction you
will realize. So different designs have different pin
to pin delays.
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