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rudenia
Joined: 13 Aug 2004
Posts: 4
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 16 Sep 2004 10:38 overshoot and undershoot |
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| what is overshoot and undershoot and how it could be avoided when designing the board?
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edavio
Joined: 23 Dec 2001
Posts: 71
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| 16 Sep 2004 12:35 Re: overshoot and undershoot |
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| it is ringing phenomenon at the rise time and fall time. It is due to impedance mismatch. So, make the interconnect trace has constant impedance.
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rfmw
Joined: 10 May 2001
Posts: 478
Helped: 36
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| 16 Sep 2004 15:02 Re: overshoot and undershoot |
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ringing and over/undershoot is increased with shorter rise/fall time. If your rise/fall time is greater than 2-3 ns, you probably don't need to worry about trace impedance. But if your signal has rise/fall time shorter that 1 ns, you must ensure constant impedace and proper termination. However some termination schemes (serial termination) use the efect of overshoot, so it doesn't have to be a bad thing.
Find some great application notes from ON Semi about ECL termination and a great ECL book called ECL systems design handbook, practically a bible for ECL techology 
hope this helps,
rfmw
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lyric
Joined: 29 Jun 2003
Posts: 23
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| 21 Sep 2004 7:49 overshoot and undershoot |
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| because impedance mismatch!
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chinara
Joined: 15 Sep 2004
Posts: 96
Helped: 2
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| 27 Sep 2004 6:08 Re: overshoot and undershoot |
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| Overshoot may be avoided by placing a resistor at the source. It is often called source resistance. Although the resistor will less the amplitude of signal at same time, it will match the resistance at source terminal. I think the undershoot may be produced by the cross talk noise at most cases.
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Rayengine
Joined: 18 May 2001
Posts: 314
Helped: 3
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| 03 Oct 2004 3:00 Re: overshoot and undershoot |
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| It not only a PCB layout problem, but also circuit design. In PCB layout, try to isolate the high speed signal to prevent it cross-coupling to other signals. Correct grounding scheme is also help a lot!
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madjid
Joined: 29 Aug 2004
Posts: 36
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| 13 Oct 2004 12:38 Re: overshoot and undershoot |
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Hi,
You can find details in this book :"High-speed digital design, a handbook of Black Magic". It's a good reference.
You can look for it on ebook forum.
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arcaphill
Joined: 17 Dec 2003
Posts: 89
Helped: 1
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| 22 Oct 2004 8:28 overshoot and undershoot |
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| It's reason is impedance mismatch
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guybrush
Joined: 13 Oct 2004
Posts: 25
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| 22 Oct 2004 8:47 Re: overshoot and undershoot |
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| Pay attention to over and undershoot in High Speed Digital Design, becuase these transient can also exceed the maximun allowed voltage range of the I/O and reduce the reliability of a design.
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ushisna
Joined: 06 Aug 2008
Posts: 9
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| 13 Aug 2008 9:41 Re: overshoot and undershoot |
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| I have one doubt.Can the overshoot value exceed the absolute maximum rating specified for it in the datasheet?
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FvM
Joined: 22 Jan 2008
Posts: 2630
Helped: 431
Location: Bochum, Germany
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| 13 Aug 2008 16:33 overshoot and undershoot |
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| Of course it can, but this operation also can damage the device.
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insrusingh
Joined: 08 Jul 2008
Posts: 16
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| 28 Aug 2008 6:23 overshoot and undershoot |
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Overshoot and undershoot taked place due to impedence mismatch as many has mntioned above.
generally it is 3% to 5 % of the maximum value sometimes it will be mentioned in the datasheet directly but many tims it is mentioned indirectly
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