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gunturikishore
Joined: 19 Aug 2004
Posts: 140
Helped: 7
Location: INDIA GANDHINAGAR
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 31 Aug 2004 15:51 BSIM3 question |
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Hi
plz tell me somebody to how much extent the NCSU CDK can be used. While simulating the transistors and MOS BSIM3 which model files to be used. CAn they scale to .18u M technolgy??
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dibl01
Joined: 11 Jul 2002
Posts: 121
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| 31 Aug 2004 18:08 Re: BSIM3 question |
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| gunturikishore wrote: |
Hi
plz tell me somebody to how much extent the NCSU CDK can be used. While simulating the transistors and MOS BSIM3 which model files to be used. CAn they scale to .18u M technolgy?? |
I believe the hspice model files of NCSU CDK were measured from the TSMC process directly. The only drawback is that they does not support different process corners.
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DoctorX
Joined: 02 Sep 2004
Posts: 73
Location: USA
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| 03 Sep 2004 23:04 Re: BSIM3 question |
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| gunturikishore wrote: |
Hi
plz tell me somebody to how much extent the NCSU CDK can be used. While simulating the transistors and MOS BSIM3 which model files to be used. CAn they scale to .18u M technolgy?? |
Forget about the spice models coming with NCSU CDK. For one thing, they actually come from mosis.org, i.e., roughly fitted models by MOSIS based on MOSIS's test structures. For another, it is for TSMC 0.35 um CMOS.
If you want to do any serious design, you have to get TSMC's 0.18um Spectre/SpectreS models via MOSIS. I used them to design two chips for 1-7 GHz. They work OK.
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srivatsan
Joined: 04 Aug 2004
Posts: 183
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| 12 Sep 2004 21:50 Re: BSIM3 question |
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| I am presently working on the BSIM3v3.2 parameters. What are Corner Parameters?
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tlihu
Joined: 02 Jan 2002
Posts: 634
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| 13 Sep 2004 5:00 Re: BSIM3 question |
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| DoctorX wrote: |
| If you want to do any serious design, you have to get TSMC's 0.18um Spectre/SpectreS models via MOSIS. |
How can I get TSMC's models from MOSIS? I'd like to know more about it. Many thanks.
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srivatsan
Joined: 04 Aug 2004
Posts: 183
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| 13 Sep 2004 17:23 Re: BSIM3 question |
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Tilhu:
http://www.mosis.org/cgi-bin/cgiwrap/umosis/swp/params/tsmc-018/t46u_lo_epi-params.txt
download it. its free.
srivats
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DoctorX
Joined: 02 Sep 2004
Posts: 73
Location: USA
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| 14 Sep 2004 17:29 Re: BSIM3 question |
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MOSIS add one or two test structures on some wafers for each batch (so called "run") of fabrications, and they extract SPICE models from them, and post the models at MOSIS's website as free models. So called "run-specific models".
On the other hand, vendors, such as TSMC, do the same (every year or so), and release the models as "vendor models", and their distribution is controlled.
The MOSIS models are more up-to-date, reflecting the speed difference of each run; the vendor models are more accurate. For analog design, you should primarily use the latter.
Big companies, when using outside fabs, typically fabricate their own test patterns and extract their own SPICE models. University workers generally cannot afford to do that.
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srivatsan
Joined: 04 Aug 2004
Posts: 183
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| 14 Sep 2004 19:02 Re: BSIM3 question |
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DoctorX wote:
.."The MOSIS models are more up-to-date, reflecting the speed difference of each run; the vendor models are more accurate. For analog design, you should primarily use the latter. "....
If you look at the MOSIS website, there is something called Corner parameters. What are those? Also vendor release of models are little bit expensive. So if there are no choices ofmodels except the MOSIS models, then what are the probabilities of failure when using them?
thanks in advance..
srivats
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