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seseandy
Joined: 02 Aug 2004
Posts: 18
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 13 Aug 2004 6:59 sram bist logic |
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bist_clk ,bist_test and bist_result are bist logic signal
who can give some explain about these signals,such as bist_result ,a signal will output what waveform in bist mode?
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gaonkc
Joined: 16 Jul 2004
Posts: 107
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| 16 Aug 2004 6:23 sram bist logic |
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| the output of bist result is fail or pass, no standard waveform , you can detect the result value is ok
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AndyJing
Joined: 06 Aug 2004
Posts: 32
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| 16 Aug 2004 7:40 Re: sram bist logic |
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bist result is different according vendor.
Atmel bist logic result port will output signature waveform
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tom123
Joined: 04 Apr 2005
Posts: 116
Helped: 3
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| 15 Jun 2005 13:05 Re: sram bist logic |
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bist_clk: clk for bist logic;
bist_test: bist test enable signal;
bist_result: indicate bist test pass or fail, it is a level signal,
there should be a another signal
bist_finished: indicate bist test is finish.
we can determine the bist test is pass or fail by bist_result and bist_finished,
if bist test has finished , bist_result indicates test is pass or fail;
| seseandy wrote: |
bist_clk ,bist_test and bist_result are bist logic signal
who can give some explain about these signals,such as bist_result ,a signal will output what waveform in bist mode? |
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wanzuha
Joined: 21 Jul 2005
Posts: 4
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| 21 Jul 2005 9:56 sram bist logic |
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Yes bist_result is a logic signal. You will get this result after making a comparing between two output datas, which known good data and output form DUT.
The final result is either pass/fail
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