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totoro
Joined: 27 Jun 2004
Posts: 84
Helped: 10
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 21 Jul 2004 16:29 I want to design to pipeline adc, for training. |
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Could you give me a reasonable specification which need include speed, resolution, power at least.
I prefer to choose vdd as 3.3v, 0.35 or 0.25 CMOS process.
The followering purposes are expected to achieve though this training:
1. deeply understanding the S/H circuit design
2. high speed comparator design technique
3. digital calibrate technique
Any one would help me?
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santhoshv78
Joined: 22 Jun 2004
Posts: 72
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| 22 Jul 2004 1:45 Re: I want to design to pipeline adc, for training. |
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You can refer some of the datasheets of ppipelined ADC for the specification..
For training, I guess, 10bit - 50M to 100MHz is ok..
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nxing
Joined: 10 May 2004
Posts: 446
Helped: 12
Location: China
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| 22 Jul 2004 5:51 I want to design to pipeline adc, for training. |
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go to http://kabuki.eecs.berkeley.edu/ to download some thesis and the follow them.....
Good Luck
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stanlangley
Joined: 16 Mar 2004
Posts: 19
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| 23 Jul 2004 13:20 I want to design to pipeline adc, for training. |
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| The book "Data onverters for communication" is also a good reference.
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Eboy
Joined: 03 Jun 2004
Posts: 5
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| 28 Jul 2004 0:57 Re: I want to design to pipeline adc, for training. |
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Check this for understanding and practicing:
http://www.maxim-ic.com/appnotes10.cfm/filter/category
It is a very good Application Notes.
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