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DSP Gurus please help

 
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eda_wiz



Joined: 07 Nov 2001
Posts: 717
Helped: 30


Post27 Jun 2004 9:34   DSP Gurus please help

Hi Friends,
I am involved in the design of UltraWideBand (UWB) baseband processor for MB-OFDM.. Currently doing the implementation of FFT/IFFT block....
proceeding with Radix2 single dealy feedback architecture for FFT block .. The data through put requirements are very high .. that I am not very sure whether this architecture will be sufficient.... also I need a verylow power implementation with low area...

does anyone have any suggestions regarding the architecture...

how should i implement the multiplies and adders ...
I am currently using the * , + operators in verilog.... I think this will increase the gate size.. any suggestions for booth multipliers.. fast adders..


regards
whizzzkid
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xirix



Joined: 26 Jun 2001
Posts: 156
Helped: 1


Post28 Jun 2004 8:56   Re: DSP Gurus please help

In general adders are not a problem for synthesis tools, but multipliers yes. Below a 8x8 model.


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aravind



Joined: 29 Jun 2004
Posts: 569
Helped: 22
Location: india


Post30 Jun 2004 8:10   Re: DSP Gurus please help

hi
im also working in that area . send ur detail block diagram and implementation techniques and constraint for designs
pls help
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