simulation after place and route in ISE 5.2

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Tomby

Joined: 29 Aug 2003
Posts: 22

19 Apr 2004 21:41 compexlib

Hello,

I am trying to run my testbench to do a simulation check after Xilinx has done place and route for the design. When it brings modelsim up and tries to simulate it gives errors such as:

# ** Error: (vsim-19) Failed to access library 'xilinxcorelib_ver' at "xilinxcorelib_ver".
# No such file or directory. (errno = ENOENT)

Can anyone tell me what this error means or what option I need to set in ISE 5.2 to fix this?

Thanks.

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Git

Joined: 12 Dec 2001
Posts: 1118
Helped: 1
Location: Torino

19 Apr 2004 22:40 Re: simulation after place and route in ISE 5.2

The simulation libraries for verilog aren't compiled by default, you will have to do it yourself. Check the documentation/help for Compexlib.

Git

Tomby

Joined: 29 Aug 2003
Posts: 22

20 Apr 2004 16:20 Re: simulation after place and route in ISE 5.2

yes, but it seems to hang and not stop when i run the compxlib

also, since xilinx ise 5.1 generates a new .v file for every step does that mean I have to create a new testbench for the new *.v file that ise generated for the post layout simulation?

Thanks

skynet

Joined: 18 Apr 2002
Posts: 85
Helped: 1

20 Apr 2004 17:29 Re: simulation after place and route in ISE 5.2

have u added the testbench in your project?? if you added ur testbench, it should not having this problem.. if it still having this problem, look into ur xilinx ISE folder and find simulation library