bjwljh
Joined: 11 Sep 2002
Posts: 18
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 20 Nov 2003 9:11 How to implement a second order sigma delta dac using fpga |
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I have read the articles from xilinx about implement sigam delt dac using
fpga,but it is only one order.Now I need to design a two order or higher
order sigma delta dac.
I implement the a second order imitating the structure of the article.But I
am confused when I simulate it.
For example ,if the dacin is ff(the maxvalue) according to my understand, the dacout should always be high level. But actually,the dacout changed periodly.
I guess the problem derives from the one bit feedback.Should the feedback value that add to the first order value and the second order value be different?
Can someone help me and give me some articles about the high sigma delta dac?
Thanks
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