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FLEXcertifydll
Joined: 04 Sep 2003
Posts: 292
Helped: 3
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 04 Sep 2003 10:11 Can FPGA be encrypted? |
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FPGA is base on SRAM, every time power up ,source code down to the FPGA. So how to encrypt IP core used for FPGA? And how design the IP core whit time-limited? Did anyone know it?
THX!
  
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xirix
Joined: 26 Jun 2001
Posts: 156
Helped: 1
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| 04 Sep 2003 10:45 |
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For IP protection you can use Actel devices (both flash and antifuse).
For time-limit use you must implement a protection method in an extern device. For example at power-down read time from a real time clock, save in a flash device...at power-up read flash...and there are a lot of smart (access protected) flash memories.
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FLEXcertifydll
Joined: 04 Sep 2003
Posts: 292
Helped: 3
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| 04 Sep 2003 11:23 |
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So I must design a machine-status for writing flash and the right position in the source code? At the power-down the clock data save in a protection regist in flash, and at power-up logic detect the protection regist verify the right of IP core. Right?
THX!
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tcn
Joined: 31 May 2001
Posts: 30
Helped: 1
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| 04 Sep 2003 11:45 |
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Xilinx has encryption enabled devices (Virtex devices). I would suggest going this way. The firmware is encrypted at compile time.
tcn
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steshenko
Joined: 31 May 2002
Posts: 67
Helped: 1
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| 09 Sep 2003 16:59 |
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| We use little CPLD with special code check circuit and some part of main circuits - and set protect bit. We have no problem with this decision/ CPLD and FPGA work together
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volta
Joined: 08 Sep 2003
Posts: 30
Location: Sweden
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| 10 Sep 2003 7:57 Xilinx Comes to Rescue |
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| Use Xilinx Virtex-II devices for code protection
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ddt694
Joined: 12 Dec 2002
Posts: 174
Helped: 5
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| 28 Sep 2003 13:33 |
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"Using Xilinx Virtex-II devices for code protection" is not a good choice. The code can be read out when
configuring from eeprom for fpga.
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ch_wen
Joined: 08 Feb 2002
Posts: 29
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| 28 Sep 2003 16:31 |
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| ddt694 wrote: |
"Using Xilinx Virtex-II devices for code protection" is not a good choice. The code can be read out when
configuring from eeprom for fpga. |
Did you know the Virtex-II features?
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dll_embed
Joined: 04 Sep 2003
Posts: 116
Helped: 1
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| 29 Sep 2003 3:17 Re: Can FPGA be encrypted? |
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virtex-II has a triple DES encryption engine built in. You can program the KEY only by JTAG. And the bitstream is encrypted by the KEY. I guess it should be a tough job to recover the original bitstream after it is encrypted.
The only thing inconvient is that it needs a seperate battery to power this circuit.
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wasp
Joined: 10 Jan 2003
Posts: 29
Location: Russian Federation
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| 29 Sep 2003 13:28 Re: Can FPGA be encrypted? |
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| One of ways of restriction on time is an addition in the project of the counter,which works during time of the sufficient project for demonstration, and then blocks work.
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elektryk
Joined: 25 Apr 2002
Posts: 109
Location: POLAND
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| 29 Sep 2003 16:54 Re: Can FPGA be encrypted? |
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| Lastly I find out smart trick. It need some research but I this it is possible. There is need to be some kind of eeprom or flash memory inside chip that can be written from inside of chip. Every rewriteable device have some limitation about writing it. How about, every use of device, write some kind of signature (every time diffrent) and veryfy it. If write was wrong the time is out.
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