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sanjay
Joined: 04 Jul 2003
Posts: 117
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 17 Jul 2003 9:08 Help needed for Pin Allocation for Xilinx ISE4.2 |
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HI there,
A help is required in the Xilinx ISE 4.2 Software.
I know that xilinx automatically allocates pins for the device architecture.
But we want to allocate pins manually..
Does anybody know how to do it.
Help would be appreciated
Thanks
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Bartart
Joined: 20 Feb 2002
Posts: 127
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| 17 Jul 2003 9:20 |
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Hi!
Look @ this post!
http://www.elektroda.pl/eboard/viewtopic.php?t=53904&highlight=ucf
Bart
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M!k
Joined: 22 Apr 2002
Posts: 813
Helped: 69
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| 17 Jul 2003 9:31 |
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there are 2 possibilities:
1. assigning the pins in the constraints editor (not always working)
2. manually editing the constraints file (*.ucf). It can look like that:
NET digit_select<0> LOC=P3;
NET digit_select<1> LOC=P5;
NET digit<1> LOC=P20;
NET digit<0> LOC=P21;
I'd suggest the last method cause there seem to be some bugs in the constraints editor of ISE 4 ....
Note: in the post bartart referred to the syntax is for ISE5.x (containing quotation marks)
Mik
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KA
Joined: 12 Aug 2002
Posts: 22
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| 17 Jul 2003 11:46 |
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attribute pin_assign : string;
attribute pin_assign of Clock_G : signal is "30";
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sanjay
Joined: 04 Jul 2003
Posts: 117
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| 17 Jul 2003 18:18 |
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Thank you guys for the reply to my much needed help.
The idea of editing the User Constraint file was really a start.
Well we found out that Xilinx itself has its own software driven GUI which allows you to specify both pin and timing contstaints and this program is known as Xilinx Constraint Editor.
Only found it out today.
But thnks for the hints and the help.
With regards
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simon2kk
Joined: 21 Nov 2001
Posts: 36
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| 17 Jul 2003 21:35 |
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| In ISE 5.1 or later, you can use PACE. It is very easy to use for pin assignment and area constraint.
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