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xiongdh
Joined: 18 Jul 2002
Posts: 76
Helped: 1
Location: china mainland
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 10 Jul 2003 3:18 Can anyone give me advices of the clock in USB. |
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Can anyone give me advices of the clock in USB device.
My USB device support full speed and low speed and has no external crystals oscillator but a internal crystals oscillator.
Can you give me some informations ,url link and advices about clock recovery,DPLL,and oversampling.
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ttspice
Joined: 24 Dec 2001
Posts: 93
Location: Republic of Taiwan
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| 10 Jul 2003 4:31 |
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Most USB 1.1 device follows the SIE VHDL model released from Intel in 1995, It uses 48MHz clock to oversample 12MHz (full speed) signal. I remember they have a white paper of SIE to explain the algorithm, you can try to search it on internet, somehow it's a very old stuff...
The clock recovery is a state-machine to watch the edge of input signals like most DPLL does. SIE stands for Serial Interfec Engine.
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xiongdh
Joined: 18 Jul 2002
Posts: 76
Helped: 1
Location: china mainland
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| 10 Jul 2003 9:17 |
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thanks.
Do you mean the paper "Desiging A robust USB serial interface engine(SIE)" ,I haved find this file.
But I can't find the SIE VHDL model.Who can give me one.
thanks my mail:dehuixiong(at)sohu.com
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cqjhq
Joined: 02 Dec 2002
Posts: 19
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| 10 Jul 2003 16:26 |
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Hi dehuixiong,
Can you share your file?
thanks my mail:cqjhq(at)163.net
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xiongdh
Joined: 18 Jul 2002
Posts: 76
Helped: 1
Location: china mainland
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| 11 Jul 2003 1:24 |
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| cqjhq wrote: |
Hi dehuixiong,
Can you share your file?
thanks my mail:cqjhq(at)163.net |
I sent it to you.
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Google
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11 Jul 2003 1:24 Ads |
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kjhgkj
Joined: 11 Jul 2003
Posts: 2
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11 Jul 2003 8:27 Phoenix USB Verilog sources available |
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| If anybody wants them, PM me.
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trxcom88
Joined: 03 Nov 2009
Posts: 0
Location: China
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03 Nov 2009 13:33 Can anyone give me advices of the clock in USB. |
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