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madmax
Joined: 10 Jan 2003
Posts: 12
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 28 Jun 2003 16:27 Designing with Interrupts |
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Hi ,
I'm working in the embedded application.I design using FPGA's.In one of my design, there are lots of interrupts given to microprocessor. Only one interrupt is connected to the Microprocessor interrupt pin physically.But microprocessor identifies the different interrupts by reading the master register(8 bits) and its corresponding slave registers inside the FPGA design.Interrupts are having priority also.
Is there any material which describes how to design for handling interrupts for these type of application.Issues when designing with interrupts
For example : when the interrupt pin should be asserted low after reading the
master register or the corresponding slave register
Thanks in Advance ,
Max
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sawaak
Joined: 20 May 2003
Posts: 146
Helped: 4
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| 28 Jun 2003 21:46 |
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i think reading the datasheet of some standard product like 8259 should help.
thanks
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juripero
Joined: 30 Jul 2002
Posts: 96
Helped: 3
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| 29 Jun 2003 2:44 |
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| try @ltera sites, they have a good application notes on handling interruput of Nios processor
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