How to protect the bitstream in Xilinx/Altera FPGA?

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clifftsai

Joined: 19 Feb 2002
Posts: 15

18 Jun 2003 8:15 How to protect the bitstream in Xilinx/Altera FPGA?

Hi,

Actel have some Fuse and Flash base FPGA that can protect the bitstream inf FPGA device .
Does Xilinx or Altera have similiar function or devices?

tlp71@hotmail.com

Joined: 14 May 2002
Posts: 476
Helped: 4

18 Jun 2003 8:23

VirtexII have the feature to encrypt the bitstream with a triple des algoritm. to use this feature you need to have a backup battery to preserve your keys in FPGA device when VCC shotdown.
Bye

wasp

Joined: 10 Jan 2003
Posts: 29
Location: Russian Federation

19 Jun 2003 8:20 Try that link...

http://www.free-ip.com/copyprotection.html

MegaVolt

Joined: 02 Aug 2002
Posts: 0

02 Jul 2003 9:19

Other Xilinx device not have the feature to encrypt the bitstream

arena_yang

Joined: 01 Apr 2003
Posts: 36

02 Jul 2003 9:26

Typically, If we use CPLD/EPLD, we can check the encrypt bit in the development software,

but FPGA itself cannot be protected because of the SRAM architecture.

I have one method to protect FPGA design: you can design a PRBS generator in FPGA and CPLD, the CPLD acts as the microprossor to config the FPGA, and as the decrypt seed when the FPGA configuration is complete.

in FPGA, if the seed is not equal to the PRBS generated in FPGA, the FPGA will stay in the reset state. so that we can protect our design based on FPGA.

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02 Jul 2003 9:26 Ads

my_garden

Joined: 14 Dec 2001
Posts: 134

03 Jul 2003 4:20

I agree Arena_yang.
You can use one CPLD to encrypt the source in FPGA. You can design one key in CPLD, or put one part of logic in CPLD.

tlp71@hotmail.com

Joined: 14 May 2002
Posts: 476
Helped: 4

07 Jul 2003 21:32

if you use a cpld to make a cypher decoder you have everithing a net where the bitstream is readable.
If you would protect VII, antifuse FPGA or Asic.

allegro

Joined: 22 Oct 2001
Posts: 43

08 Jul 2003 3:30

I heard that somebody can read back the decrypte CPLD.So it seemed that there is no way to protect our design.

zape

Joined: 10 Jul 2003
Posts: 104
Helped: 9
Location: Spain

10 Jul 2003 11:57

A possible solution, only valid if you produce a low number of units, is based on the use of DS2401 (a Silicon Serial Number from Dallas). Your FPGA shall read this device and check for a valid number (so you will need one configuration bitstream per FPGA).

A Xilinx application note is attached.

Sorry, but you need login in to view this attachment

YUV

Joined: 26 Sep 2002
Posts: 111
Helped: 9
Location: Ukraine

10 Jul 2003 12:51 Wiring protection

Encryption... Decryption...
All kinds of protection need extra hardware.
Idea

I have a simpler decision, which doesn't need any hardware. You already got it! It's your PCB. You should put some connections onto internal layer. Your design can use only 2 pins (in & out) for testing PCB wiring. If wrong, Mad

.
I agree, simple PCB can't protect efficiently. But do you really need protection for simple project Question

For complex design you will use multilayer PCB and (may be) FPGA in BGA package. Wiring protection will be superior Exclamation

PCB IS A KEY FEATURE OF DESIGN
Razz

dainis

Joined: 15 May 2001
Posts: 1451
Helped: 56

10 Jul 2003 15:33

zape wrote:

Direct link:
http://w*w.xilinx.com/xapp/xapp198.pdf

Regnum

Joined: 17 Jun 2004
Posts: 264
Helped: 12
Location: Hurlingham

08 Feb 2005 16:29 Re: How to protect the bitstream in Xilinx/Altera FPGA?

Encrypting the FPGA bitstream externally is useless... anyways you may sample it at the FPGA configuration pins.
Put a tiny but vital piece of code into a cheap CPLD working interlocked to the main FPGA.

alixedi

Joined: 09 Jul 2004
Posts: 5
Location: Karachi, Pakistan

09 Feb 2005 7:18 Re: How to protect the bitstream in Xilinx/Altera FPGA?

Xilinx have bit released the standard for its bitstreams ie. the bitsream cannot be reversed to get any idea of the logic implemented. However, this does not protect against mindless reverse engineering by uploading the bitstream from the configuration PROM and employing reverse engineering to duplicate the remaining PCB. To tackle this problem, you need extra hardware namely an encryption logic of some sorts to protect your design.