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Ansunamu
Joined: 19 Oct 2001
Posts: 257
Helped: 4
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 23 Feb 2003 13:05 Writing the USB stimulus |
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| Could anyone recomment me how to write USB stimulus for my device core ? It's not easy to write a flexible stimulus code for USB . Someone told me Vera is a good choice but i never used it . How about Vera ?
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visualart
Joined: 21 Dec 2001
Posts: 582
Helped: 26
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| 24 Feb 2003 1:45 Re: Writing the USB stimulus |
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I'm writing USB20 function. could you introduce your project?
| Ansunamu wrote: |
| Could anyone recomment me how to write USB stimulus for my device core ? It's not easy to write a flexible stimulus code for USB . Someone told me Vera is a good choice but i never used it . How about Vera ? |
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rakko
Joined: 01 Jun 2001
Posts: 231
Helped: 2
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| 24 Feb 2003 4:37 |
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| if by "stimulus" you mean you want to generate test vectors to excercise your device core, then may be you should look into verisity eVEC tool. It is great for generating random and controlled test stimulus. if, one the other hand, you want to develop code such as device driver, then look into NuMega's driver studio. This tool writes your device usb driver for you. all you have to enter is a few question about your endpoints characteristics along with some other vendor information. if you want to write the driver or the test vector yourself, then search the web for "linux usb driver development" there are lots of good primer and code templates out there to get you pointed in the right direction.
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alanray
Joined: 11 Jul 2002
Posts: 22
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| 27 Aug 2003 14:07 |
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| you can use synopsys smartmodel
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aegean.chou
Joined: 16 Jun 2002
Posts: 63
Helped: 1
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| 04 Sep 2003 16:58 |
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You should use verilog task to create some function :
1) signals
2) bits
3) fields
4) packets
5) transactions
6) transfers
7) chapter9
...
you can get help from "Linux USB driver" to write a robust TESTING environment!
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