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AVR model bug in Proteus VSM 5.20.7

 
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michu



Joined: 06 Dec 2001
Posts: 11
Location: Poland


Post01 Feb 2003 22:08   AVR model bug in Proteus VSM 5.20.7

There is a serious bug in AVR model in Proteus VSM Exclamation

It seems that the simulator pushes a return address of CALL instruction with bytes in wrong order, which is difficult to trace because of RET instruction also working that way.

The problem occures when you want to run e.g. AvrX in Proteus VSM env., because of IJMP instructions used in context switching....

Does anyone know if the bug is removed in Proteus 6.0 or how to patch original AVR dll to cure the problem Question
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AplusB



Joined: 04 Feb 2003
Posts: 1


Post05 Feb 2003 22:36   AVR model bug in Proteus VSM 5.20.7

Also in version 5.20.07.

The simulator does not recognise the BLD instruction. It is just executed as a NOP. A way to overcome this bug is to use the CBR or SBR instruction, for T=0 or T=1 resp.

Wonder whether this bug is solved in version 6???
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