| Author |
Message |
CRiSP
Joined: 28 May 2001
Posts: 168
|
 26 Jan 2003 11:28 high speed fifo design |
|
|
|
it is ease to design a common fifo(syn/asyn).but,it is difficult to design a high speed fifo.
please share your opinion.
|
|
| Back to top |
|
 |
cyteng
Joined: 06 Aug 2001
Posts: 33
|
| 28 Jan 2003 3:07 |
|
|
|
| How fast do you consider it as "high speed" ?
|
|
| Back to top |
|
|
CRiSP
Joined: 28 May 2001
Posts: 168
|
| 28 Jan 2003 3:18 >300Mhz |
|
|
|
| for example:it is over 300Mhz.
|
|
| Back to top |
|
|
rewkie
Joined: 02 Dec 2002
Posts: 10
|
| 05 Feb 2003 5:33 |
|
|
|
| I want to kown how to do?
|
|
| Back to top |
|
|
juripero
Joined: 30 Jul 2002
Posts: 96
Helped: 3
|
| 05 Feb 2003 7:07 |
|
|
|
| Depending on the process you are using, it is relatively simple if you are talking about .15 or .13 CMOS process.
|
|
| Back to top |
|
|
gab
Joined: 17 May 2001
Posts: 22
|
| 07 Feb 2003 5:53 |
|
|
|
Or you can use a highly pipelined code.
More clock cycles but working over 300 MHz
gab
|
|
| Back to top |
|
|
wintel
Joined: 15 Mar 2003
Posts: 5
|
| 17 Mar 2003 10:44 |
|
|
|
i want to know abt the detail architecture of fifo & different types of fifo with design.
Thanx
wintel
|
|
| Back to top |
|
|
juripero
Joined: 30 Jul 2002
Posts: 96
Helped: 3
|
| 17 Mar 2003 19:27 |
|
|
|
| search at TI's site on FIFO design, they have an excellent application note on FIFO architecture and design issues
|
|
| Back to top |
|
|
ttspice
Joined: 24 Dec 2001
Posts: 93
Location: Republic of Taiwan
|
| 18 Mar 2003 4:10 |
|
|
|
I don't think speed is the issue of FIFO if it is synchronous,
most problem we find is the asynchronous FIFO...
this may help, Mr.Cummings SNUG paper about asyn-FIFO design
attachment deleted. You can find it here: http://www.sunburst-design.com/papers/
(posted 200 times on elektroda)
|
|
| Back to top |
|
|
wintel
Joined: 15 Mar 2003
Posts: 5
|
| 18 Mar 2003 9:11 |
|
|
|
| give me the detail architecture of synchronous fifo with design
|
|
| Back to top |
|
|
