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Jitter (pvt sensitivity) of buffer line.
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JuliaJ



Joined: 29 Oct 2009
Posts: 3
Location: Austin, Texas
Post02 Nov 2009 21:42   

Jitter (pvt sensitivity) of buffer line.
On a clock path I had to use buffer insertion technique to achieve specific delay. How can I estimate the additional jitter these buffers give to the signal? In general, from your experience with TSMC 65 G, what variation every clock-type buffer can cause?

Thanks.
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