electronics forum

Rules | Recent posts | topic RSS | Search | Register  | Log in

how can i generate oe signal for sda bidirection signal?


Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> how can i generate oe signal for sda bidirection signal?
Author Message
tengzhg



Joined: 29 Oct 2009
Posts: 2


Post29 Oct 2009 7:57   

iic bidirection signal


hey,

i am working with a project where one iic port(from master to slave) should be feed through FPGA.
my question is : how can i generate oe signal for sda bidirection signal?




i appreciate any help!
Back to top
Google
AdSense
Google Adsense




Post29 Oct 2009 7:57   

Ads




Back to top
FvM



Joined: 22 Jan 2008
Posts: 5162
Helped: 767
Location: Bochum, Germany


Post29 Oct 2009 8:38   

iic bidirection signal


When defining a project, it's a good idea to start with checking the feasibility.

You may want to consult the datasheets of I2C bidirectional buffers, e.g. Philips/NXP P82B96 to understand,
why "feed through" doesn't work with a FPGA. In a short, it depends on a special hardware, that detects different voltage
levels at the bus. There's a theoretical option, to decode the protocol completely and detect the data direction for each bit.
Back to top
tengzhg



Joined: 29 Oct 2009
Posts: 2


Post31 Oct 2009 8:43   

Re: iic bidirection signal


thank for your advice!
Back to top
Arabic versionBulgarian versionCatalan versionCzech versionDanish versionGerman versionGreek versionEnglish versionSpanish versionFinnish versionFrench versionHindi versionCroatian versionIndonesian versionItalian versionHebrew versionJapanese versionKorean versionLithuanian versionLatvian versionDutch versionNorwegian versionPolish versionPortuguese versionRomanian versionRussian versionSlovak versionSlovenian versionSerbian versionSwedish versionTagalog versionUkrainian versionVietnamese versionChinese version
Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> how can i generate oe signal for sda bidirection signal?
Page 1 of 1 All times are GMT + 1 Hour
Similar topics:
How to generate clock signal by PLL for FIR? (2)
How to generate the testbench for signal process algorithim? (6)
how to generate clock signal for ADC & DAC? (9)
How can I get 2M CLK signal from 19.44M Overhead signal? (23)
Can small signal analysis be used for large signal operation (6)
How to generate a FM signal? (3)
how to generate jittered signal source? (2)
how to generate 100 Hz clock signal ??? (11)
How to I generate a digital controlled 0-5V analog signal. (8)
How to generate high frequecny clock signal (6)


Abuse || Administrator || Moderators || Support us || sitemap
topic RSS