pilu.sandeep
Joined: 30 Apr 2007
Posts: 253
Helped: 137
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 28 Oct 2009 6:28 Hot openings in ASIC Design/Verification in Snowbush IP |
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Hi,
We are looking for experienced engineers for Senior Design Engg and Senior Verification Engg. Please respond as soon as possible.
Job Requirements:-
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Job Title - Senior ASIC Verification Engineers
Experience - 5 - 12yrs
Job Description -
Role: Independently handle verification of a product line.
Able to handle a team of 3+ engineers
Provide customer support
Drive process implementations and mentoring
Technical Skills: Experience in Verilog
Expert knowledge in High Level Verification languages like SystemVerilog, e, vera
Expert knowledge in Object Oriented Verification Methodologies e.g. OVM, eRM, VMM
Experience in High Speed Serial protocols - USB 2.0/3.0, PCIe, SATA, XAUI, SAS
Experience in architecting BFM IPs for High Speed Serial Protocols
Experience in SoC verification
Experience in Customer interaction
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Job Title - Senior ASIC Design Engineers
Experience - 5 - 12yrs
Job Description -
Role: Independently handle architecture and design of a SoC product line.
Able to handle a team of 3+ engineers
Provide customer support
Drive process implementations and mentoring
Technical Skills: Experience in architecting SoCs.
Experience in synthesizable low-power verilog-based design
Experience in spec to silicon of SoCs.
Experience in High Speed Serial protocols - USB 2.0/3.0, PCIe, SATA, XAUI, SAS
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Company website:- www.snowbush.com , www.gennum.com , www.asic-architectinc.com
Work Location:- Bhubaneswar, India
Send your updated resumes to sandeep.mohanta(at)gennum.com , sandeep.mohanta(at)snowbush.com
Thanks
Sandeep
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