| Author |
Message |
leeguoxian
Joined: 20 Jun 2006 Posts: 64 Helped: 3
|
28 Oct 2009 2:45 Hardware Software co-verification methodology issue ? |
|
|
|
|
Dear All :
I'm verifying a SoC with a 8051 IP core . And during the top level verification , I'm confused about how to co-verify with hardware and software !
For example, I want to test the gpio function . Then I wrote the test program . But I need to drive the stimulus to my SoC after the test program write the gpio control register. Here comes the question !
How could I know when does the test program write the gpio control register ? How could I synchronize software and hardware ?
thanks
|
|
| Back to top |
|
 |
ljxpjpjljx
Joined: 05 May 2008 Posts: 533 Helped: 12 Location: Shang Hai
|
28 Oct 2009 5:43 Re: Hardware Software co-verification methodology issue ? |
|
|
|
|
| normally , the c code should be compiled to boot rom in flash or ddr, then arm load program from flash or ddr to execute them!
|
|
| Back to top |
|
 |
Google AdSense

|
28 Oct 2009 5:43 Ads |
|
|
|
|
|
|
| Back to top |
|
 |
leeguoxian
Joined: 20 Jun 2006 Posts: 64 Helped: 3
|
30 Oct 2009 3:07 Re: Hardware Software co-verification methodology issue ? |
|
|
|
|
sorry for my poor expression.
My question is on how to talk to the testbench from a program that is running on a simulated CPU. Like when you want to test your GPIO pins, you might want control the external stimulus on the pin from within the program.
thanks
|
|
| Back to top |
|
 |