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feel_on_on
Joined: 29 Apr 2005
Posts: 260
Helped: 1
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 19 Oct 2009 5:33 how to decide setup and hold margin on state timing analyze |
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how to decide setup and hold margin on state timing analyze ？
How much margin can completely assure tapout sucessfully?
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eda_wiz
Joined: 07 Nov 2001
Posts: 720
Helped: 30
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20 Oct 2009 18:20 how to decide setup and hold margin on state timing analyze |
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depends on which stage u are doing STA.
for eg; in prelayout stage 10% margin for setup and 0% hold will do .
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feel_on_on
Joined: 29 Apr 2005
Posts: 260
Helped: 1
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21 Oct 2009 4:00 how to decide setup and hold margin on state timing analyze |
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| thanks a lot , But you can assure 10% margin is okay ? if you select another process. then...postlayout stage how much margin I should keep?
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ebuddy
Joined: 15 May 2007
Posts: 28
Helped: 1
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24 Oct 2009 21:27 Re: how to decide setup and hold margin on state timing **** |
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| Well, 10% is not a magic number. I use 15% most of the time. Also, use aggressive wireload model in your early synthesis can take some wiring delay into the synthesis consideration, which will make post-layout timing closure somewhat easier.
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feel_on_on
Joined: 29 Apr 2005
Posts: 260
Helped: 1
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26 Oct 2009 14:30 how to decide setup and hold margin on state timing analyze |
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| but ,how to gain 15% ? if you have a bigger margin ,maybe make your design timing is not better?
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ebuddy
Joined: 15 May 2007
Posts: 28
Helped: 1
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26 Oct 2009 20:53 Re: how to decide setup and hold margin on state timing **** |
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| feel_on_on wrote: |
| but ,how to gain 15% ? if you have a bigger margin ,maybe make your design timing is not better? |
Set your clock period 15% shorter than your target. Bigger margin may result a little bigger block, but make your backend design easier.
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