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hank_deng
Joined: 19 Jul 2009
Posts: 2
Location: suzhou
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 29 Sep 2009 7:52 The presicion of mom-cap in 12bit ADC |
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HI, All:
The project is a 12bit SAR-ADC, the 6 MSBs is binary-weighted mom-cap, the unit is 68fF, and the Msb is 68*32=2176fF. The 6 LSBs is resistor divider.
In the pre-simulation the ENOB is 11bit. But in the post-simulation the ENOB is just 8.6bit. I check the whole project, and find the problem is from the mom-cap array.
The adjacent mom_cap value ratio shoule be 2. But in post-simulation the wost ratio is 1.985 and 2.02. The mom_cap value is extracted from layout by Assura, the floorplan of the mom_cap array is concentrical of all bit. The inter-connection
of layout is good, no obvious extra parasitic cap. If the floorplan fo the mom_cap array is bit by bit, the ratio the mom_cap value is a little bettle, and the ENOB is 9bit.
I wonder the post-simulation results is believable? the mom_cap value is presice from Assura?
Thanks for answer and welcome for discussion!
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shanmei
Joined: 26 Jul 2006
Posts: 43
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29 Sep 2009 12:25 Re: The presicion of mom-cap in 12bit ADC |
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can you use a bigger cap unit?
where is the error from? from the parasitic line or something else?
get those line far way from the critical cap.
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timof
Joined: 21 Feb 2008
Posts: 86
Helped: 6
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30 Oct 2009 7:19 Re: The presicion of mom-cap in 12bit ADC |
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| hank_deng wrote: |
HI, All:
The project is a 12bit SAR-ADC, the 6 MSBs is binary-weighted mom-cap, the unit is 68fF, and the Msb is 68*32=2176fF. The 6 LSBs is resistor divider.
In the pre-simulation the ENOB is 11bit. But in the post-simulation the ENOB is just 8.6bit. I check the whole project, and find the problem is from the mom-cap array.
The adjacent mom_cap value ratio shoule be 2. But in post-simulation the wost ratio is 1.985 and 2.02. The mom_cap value is extracted from layout by Assura, the floorplan of the mom_cap array is concentrical of all bit. The inter-connection
of layout is good, no obvious extra parasitic cap. If the floorplan fo the mom_cap array is bit by bit, the ratio the mom_cap value is a little bettle, and the ENOB is 9bit.
I wonder the post-simulation results is believable? the mom_cap value is presice from Assura?
Thanks for answer and welcome for discussion! |
Do you "block" the MOM-capacitors from parasitic extraction (and use their SPICE models in the nelist instances), or do you extract all MOM capacitors with Assura?
Can you check if MIM capacitor metal layers are present in the technology file (procfile/p2lvsfile)?
I attach a short application note that discusses the issues of accuracy in capacitance extraction in application to MOM caps and ADCs.
Max
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