potyo2 debugging "MCLR Vdd: Low" |
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| krotus Joined: 23 Aug 2009 Posts: 3 |
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| krotus Joined: 23 Aug 2009 Posts: 3 |
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| wp100 Joined: 15 May 2009 Posts: 327 Helped: 45 Location: England |
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Several "ground" and "Vdd" connections i (2) why only "vdd" can be recognized as powernode when (4) What do "ECL", "CML", "LVDS", (6) "low output impedance" v.s. "rail-to-rail out (5) how can measure "power"and "SWR" for ant (4) wanted """""waveguide E-plane filte (2) Illegal via ("tsmc18rf" "M1_POLY1" " (1) Article "A Low-Cost 50MHz Frequency Meter" from Si (3) how to protect the "low voltage " transistors for (1) P&R with only "LEF" file and NO "LIB" (4) |