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Hitotsu
Joined: 29 Apr 2009 Posts: 21
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21 Aug 2009 8:50 10 mhz oscillator |
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Hi guys/girls, thank you for looking at this thread.
I had designed a Ring oscillator that runs at 10MHz
I had simulate fast/slow corner and find that its within +-20%
I also done Monte carlo simulation
Is there any other type of simulation that i should be doing? Say for application in RFID.
Thank you for your help
Hitotsu
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erikl
Joined: 09 Sep 2008 Posts: 737 Helped: 139 Location: Germany
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21 Aug 2009 20:42 oscillator fs type |
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| Hitotsu wrote: |
| ... Is there any other type of simulation that i should be doing? |
sf / fs conditions simulated, too?
Self start under MC-mixed conditions, especially worst case process, min. op. voltage and low temperatures (min. op. temperature ... 0°C).
Self start with slowly rising op. voltage.
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Hitotsu
Joined: 29 Apr 2009 Posts: 21
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22 Aug 2009 6:29 oscillator monte carlo simulation |
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| erikl wrote: |
| Hitotsu wrote: |
| ... Is there any other type of simulation that i should be doing? |
sf / fs conditions simulated, too?
Self start under MC-mixed conditions, especially worst case process, min. op. voltage and low temperatures (min. op. temperature ... 0°C).
Self start with slowly rising op. voltage. |
Thank you so much for telling me that. May I ask how do i simulate fs & sf? I do know for ff is just 'fast'
I don't really get the MC-mixed condition, whats is that and how can i simulate it? pls advice.
I did simulate the worst case (temp, vdd & res) though
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erikl
Joined: 09 Sep 2008 Posts: 737 Helped: 139 Location: Germany
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22 Aug 2009 13:37 Re: What type of simulation should I do for a 10MHz Oscillat |
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| Hitotsu wrote: |
| Thank you so much for telling me that. May I ask how do i simulate fs & sf? I do know for ff is just 'fast' |
fs means fast pfets combined with slow nfets, sf the other way round (and I guess it's clear what ff means ). These are other possible "worst case" combinations which could occur on a processed wafer. If your PDK contains these models, it is wise to simulate with them.
| Hitotsu wrote: |
I don't really get the MC-mixed condition, whats is that and how can i simulate it? pls advice.
I did simulate the worst case (temp, vdd & res) though |
The problem with oscillators sometimes is, that they won't self-start under special condition combinations, somewhere in the 3-dimensional PVT space, which cannot be found by just simulating the extreme corners of this space (I once happened to have an oscillator design, which worked (self-started) at all simulated PVT corner conditions, but refused to do so at the condition combination {fs , highest (!) VDD, in the T-range -25 .. 0°C}. This was discovered during lab experiments on delivered chips, and could be verified by postLayout simulation under appropriately combined simulation conditions).
This is what I meant with MC-mixed conditions: A selection of different PVT simulation combinations apart from the corner conditions. Not necessarily selected by a Monte Carlo mechanism (actually I don't know if it is possible to select random PVT combinations by the MC method); such local PVT points (combinations) could also be selected intuitively.
If you have the time, just try some more points in the PVT space! With slowly ramping-up VDD.
Good luck! erikl
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Hitotsu
Joined: 29 Apr 2009 Posts: 21
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22 Aug 2009 15:21 Re: What type of simulation should I do for a 10MHz Oscillat |
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| erikl wrote: |
| Hitotsu wrote: |
| Thank you so much for telling me that. May I ask how do i simulate fs & sf? I do know for ff is just 'fast' |
fs means fast pfets combined with slow nfets, sf the other way round (and I guess it's clear what ff means ). These are other possible "worst case" combinations which could occur on a processed wafer. If your PDK contains these models, it is wise to simulate with them.
| Hitotsu wrote: |
I don't really get the MC-mixed condition, whats is that and how can i simulate it? pls advice.
I did simulate the worst case (temp, vdd & res) though |
The problem with oscillators sometimes is, that they won't self-start under special condition combinations, somewhere in the 3-dimensional PVT space, which cannot be found by just simulating the extreme corners of this space (I once happened to have an oscillator design, which worked (self-started) at all simulated PVT corner conditions, but refused to do so at the condition combination {fs , highest (!) VDD, in the T-range -25 .. 0°C}. This was discovered during lab experiments on delivered chips, and could be verified by postLayout simulation under appropriately combined simulation conditions).
This is what I meant with MC-mixed conditions: A selection of different PVT simulation combinations apart from the corner conditions. Not necessarily selected by a Monte Carlo mechanism (actually I don't know if it is possible to select random PVT combinations by the MC method); such local PVT points (combinations) could also be selected intuitively.
If you have the time, just try some more points in the PVT space! With slowly ramping-up VDD.
Good luck! erikl |
Hi Erik,
You have been most helpful & I really appreaciate that. I will try my best to find that special condition if it exists. My ring oscillator deviate alot at Monte Carlo analysis until i think i need a digital trim. Any fundamental design advice to make it more stable? Thanks for the help once again.
Best Regards
Joe
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erikl
Joined: 09 Sep 2008 Posts: 737 Helped: 139 Location: Germany
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22 Aug 2009 16:09 Re: What type of simulation should I do for a 10MHz Oscillat |
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| Hitotsu wrote: |
Any fundamental design advice to make it more stable?
Best Regards
Joe |
Hi Joe,
just these trivial recommendations: Try to compensate temperature dependencies, and stabilize VDD !
There's no cure for process variations (apart from screening)
Cheers, erikl
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Hitotsu
Joined: 29 Apr 2009 Posts: 21
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23 Aug 2009 2:32 Re: What type of simulation should I do for a 10MHz Oscillat |
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| erikl wrote: |
| Hitotsu wrote: |
Any fundamental design advice to make it more stable?
Best Regards
Joe |
Hi Joe,
just these trivial recommendations: Try to compensate temperature dependencies, and stabilize VDD !
There's no cure for process variations (apart from screening)
Cheers, erikl |
Hi Erik
Thank for the advice, i'll think about it.
Best regards
Joe
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