Rules | Recent posts | topic RSS | Search | Register  | Log in

Help needed with SDRAM controller

 
Post new topic  Reply to topic    EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital)
Author Message
Aircraft Maniac



Joined: 18 May 2002
Posts: 371


Post21 Jan 2003 19:17   Help needed with SDRAM controller

Hi people I need verilog code for Asynchronous SDRAM controller by Cypress technologies.........

Any one having it plz mail me..........thx

Aircraft Mainac
Back to top
leonqin



Joined: 07 Nov 2001
Posts: 422


Post25 Jan 2003 17:47   

Asynchronous SDRAM ??
Back to top
Maddin



Joined: 26 Sep 2001
Posts: 163
Location: Europe


Post25 Jan 2003 18:56   

Hi Aircraft Maniac,

I don't know if it helps, but take a look at opencores.org. I know that the have some memory controller for free.
Maddin
Back to top
dingo



Joined: 10 Jul 2001
Posts: 43


Post25 Jan 2003 19:42   

SDRAM = Synchronous Dynamic Random Access Memory...


I had a very similar problem. I am using a XESS XSA-100 board:

http://www.xess.com/prod026.php3

which contains an SDRAM chip:

http://www.hynix.com/datasheet/pdf/dram/(1)HY57V281620A(L)T(1.3).pdf

connected to the Xilinx Spartan 2. I tried several projects including the
ones from Opencores, Xilinx, @ltera and others I can't remember (all for
free) and none of them worked. I bumped into the design made by XESS
by Dave Van Den Bout:

http://www.xess.com/appnotes/an-090502-sdramcntl.pdf
http://www.xess.com/projects/sdramtst.zip

which worked very well, but it uses the SDRAM in "bursts of one"
address. Unfortunately, using a simple calculator, I figured that this
wouldn't be enough to generate simple VGA video with a clock rate of
50MHz, so I decided to write my own VHDL code that knows only how
to access the memory in busts of eight locations. I am still testing it
and it has a few bugs, but it appears to be working almost OK.

I suggest you check out Dave's design and see if it meets your
requirements.
Back to top
Post new topic  Reply to topic    EDAboard.com Forum Index -> ASIC Design Methodologies & Tools (Digital)
Page 1 of 1 All times are GMT + 1 Hour


Abuse
Administrator
Moderators
topic RSS 
sitemap