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TCL tutorial or example to write testbench for VHDL code
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cwjcwjcwj



Joined: 08 Nov 2004
Posts: 246
Helped: 2
Post07 Aug 2009 13:54   

testbench tcl
I am beginner of using TCL to write testbench for my VHDL code. Anyone have a good tutorial or example that i can start with? thank you very much.
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cachep



Joined: 01 Jun 2006
Posts: 75
Helped: 4
Post14 Aug 2009 7:27   

fpga testbench tcl
You can see h**p://www.altera.com/support/examples/tcl/counter_tcl.html or www.model.com/support/technotes/tcl_tk/tcl_testbench.pdf
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Post new topic  Reply to topic    EDAboard.com Forum Index -> PLD, SPLD, GAL, CPLD, FPGA Design -> TCL tutorial or example to write testbench for VHDL code
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