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gmailbond
Joined: 09 Dec 2008
Posts: 13
Location: Bangalore
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 02 Aug 2009 13:30 What is the difference between STA and CTS? |
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What is the difference between STA and CTS when the goal of both the processes is same?Which is given highest priority and why?
Why cant we fix hold time in front end as we do setup and then move on Back end?
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D Saurabh
Joined: 03 Jun 2009
Posts: 8
Helped: 1
Location: Singapore
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04 Aug 2009 2:42 Re: What is the difference between STA and CTS? |
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STA and CTS do not have the same goals. As the names suggest - STA is a timing 'Analysis' step, where we do an analysis using tools such as Primetime to check if the design meets the timing specification. CTS on the other hand is a clock tree 'Synthesis' step - it is a step in the Implementation process of the chip, where the clock tree(s) is inserted into the design to connect a clock(s) to all FF in the design. Unlike regular logic, the clock is a high fanout net and needs special treatment to ensure that it reaches all the FF with minimal skew, latency etc. Hence this is done as a separate synthesis step after regular logic synthesis. Once the clock tree has been inserted, we do what is called a postlayout STA to check if all timing can be met.
-D
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ljxpjpjljx
Joined: 05 May 2008
Posts: 533
Helped: 12
Location: Shang Hai
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04 Aug 2009 4:12 Re: What is the difference between STA and CTS? |
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| STA and CTS is two step when doing ASIC!
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pradeepkumar481
Joined: 20 Nov 2006
Posts: 22
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12 Aug 2009 9:43 Re: What is the difference between STA and CTS? |
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hello gmailbond
what ever saurabh has said is absolutly correct. STA only deals with Timing analysis of ur circuit and CTS is w.r.t inserting the clock tree in to u r design and it (The goal of CTS) is used to minimize skew and insertion delay.
Thankyou
Pradeep
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raju3295
Joined: 04 Jan 2007
Posts: 131
Helped: 5
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12 Aug 2009 11:16 What is the difference between STA and CTS? |
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| adding to the above explanations, before CTS clock is treated as a ideal net, means its not synthesized, so there is no point in doing hold analysis , as clock reaches the both f/fs at the same time.
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