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zero stuffing
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Mkanimozhi



Joined: 08 Aug 2007
Posts: 172
Post02 Jul 2009 10:04   

zero stuffing
I need to implement the zero stuffing, but when i tried in my logic in the output i m getting little problem , for my zero stuffing input is serial input and output also serial output, can i get any code in verilog or vhdl

regards
kanimozhi
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Post02 Jul 2009 10:04   

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ksrinivasan



Joined: 29 Jun 2009
Posts: 21
Location: India
Post02 Jul 2009 11:25   

what is zero stuffing
Kani

just go through these links

http://homepages.cae.wisc.edu/~ece601/fall01/project/project_f01.pdf
http://www.msc-ge.com/download/lattice/files/rd1009.pdf
http://faculty.ksu.edu.sa/abouelela56/Pages/Thises-all.aspx

it is not having vhdl code
but somw materials that may be useful for u

are u from APEC, MMR

Srinivasan K
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