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elec-eng
Joined: 16 Nov 2006 Posts: 277 Helped: 15
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01 Jul 2009 16:16 advantages of pll |
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Hi all
could you answer my question please
thanks
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saro_k_82
Joined: 17 May 2007 Posts: 266 Helped: 55 Location: India
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01 Jul 2009 17:37 analog pll |
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| The only advantage is low jitter.
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LvW
Joined: 07 May 2008 Posts: 1466 Helped: 242 Location: Germany
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02 Jul 2009 13:01 advantages digital pll |
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| elec-eng wrote: |
Hi all
could you answer my question please
thanks |
Perhaps it makes sense first to clarify what you really mean as the phrase "digital PLL" is used in several ways. Some people mean only a digital PD/PFD and some other really mean "complete digital" (including filter and a number controlled oscillator)
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rfsystem
Joined: 25 Feb 2002 Posts: 858 Helped: 96
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04 Jul 2009 9:00 digital pll advantages |
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Within the context of actual developments
for instance the TI driven time versus voltage driven argument
http://www2.iccad.com/data2/iccad/iccad_05acceptedpapers.nsf/9cfb1ebaaf59043587256a6a00031f78/e25be1f58da7d131872570530070afb2/$FILE/2A_3slides.PDF
by this guy
http://www.faqs.org/patents/inv/236491
it is a path to preserve system performance in the presence of NONscaling
Analog does not profit in general from further scaling but price and SOC aspects contrain analog to search for alternatives.
Digital PLL is one!
But VCO is analog, beside digital driven. The missing part is the high resolution phase detector. Analog phase detectors could easy resolve 200fs-1ps of a 20ns reference clock. The effort to built an 200fs resolving, 20ns range TDC is higher than everything else.
So a litle digital here and there to avoid NONscaling analog issues!
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